机械制造者 Trailmakers

机械制造者 Trailmakers

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8-Bit Computer RAM (Slot 0)
   
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2021 年 3 月 27 日 上午 6:38
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8-Bit Computer RAM (Slot 0)

在 alvaroping1 的 1 个合集中
8-Bit Computer
4 件物品
描述
First RAM bank for my 8-Bit computer, stores the first 16 bytes of the RAM

Current program: Fibonacci sequence+smile

How to assemble:
Attach to the yellow blocks in the CPU+GPU blueprint
To attach it simply drive into its connection point and align it so that the 1x4 wedges on either side of the connection form a 1x4 block (ideally with no gaps, but can work with a very small gap), then press space

Controls:
├─WASD: Drive
└─Space: Attach to the ground

Total Blocks: 422
├─AND: 256
├─OR: 130
├─XOR: 12
├─Sensors: 16
└─Pistons: 8

Color coding:
├─Green gates: read/write functions
├─Red gates: memory bits
└─Yellow blocks: connection
6 条留言
esylling 2024 年 9 月 27 日 下午 9:02 
Short answer no. if you made upgrades like a color screen the ability to run complicated math a larger screen, a way to add LOTS of memory, have a pc that would not die with sead infinite memory slots (around 3,355,443,200 slots/creations), the ability to prosses number greater than 8bit (64bit processor) a official CPU instruction set (to not right the game from scrach). a billion years for it to run and a custom mod (which you can’t do, do to the ELUA) that reworks logic gates to run faster if you don’t have a billion years on your hands then you could say that could run doom (overlooking the details and other requirements like a life time to make something that can even get close to that). (:
Cautious_Snow 2024 年 9 月 7 日 下午 1:31 
Can it run doom
alvaroping1  [作者] 2024 年 2 月 6 日 下午 10:37 
@esylling i don't think so
esylling 2024 年 2 月 6 日 下午 7:46 
Thank you so much for the response! I understand how it works now. Do you think it is possible to make the ram use fewer logic gates than your design? I have been thinking about it for a while and cannot think of anything. Do you have any ideas?
alvaroping1  [作者] 2024 年 1 月 31 日 下午 11:38 
@eshlling It just uses toggled OR gates as single block T-flipflops. In order for them to behave like D-flipflops, the negative inputs aren't togfled, which allows sending them a -1 pulse to reset them right before new data is loaded, which allows to implement a k bits register with k+1 gates (k gates for the flipflops, and an extra gate for the reset input, which is also used to decode the address to write to in order to only reset that word). It then uses 2 extra gates per bit to route the input word to the correct word according to the given address, and to filter the output of all the words to only take that of the word specified by the address (which are then collected in the output pistons used to send data to the CPU)
esylling 2024 年 1 月 31 日 下午 9:53 
Vary cool! I wood like to now how it works since when I made my d-lach design it was insanely big and I wood like to now how you did it.